RTI-MP

The multiprocessor option for Real-Time Interface (RTI-MP) supports multiprocessor and multicore systems based on dSPACE‘s modular hardware and helps increase the performance of real-time simulations.                                                                                                                                

Application Areas.

The multiprocessor option for Real-Time Interface (RTI-MP) supports multiprocessor and multicore systems based on dSPACE‘s modular hardware and helps increase the performance of real-time simulations. It assists in setting up multiprocessor networks, including the communication channels. Multicore applications are configured in the same way as multiprocessor applications.

Working with RTI-MP.

RTI-MP lets you partition your system model and allocate the parts to the processors or cores by using simple drag & drop operations. Each processor submodel can be adjusted individually for optimum performance, including step sizes, integration algorithms and trigger conditions. After specification, you can implement your model on the processor boards with a single mouse click. Build procedures can also be automated with the help of scripts.

RTI-MP for dSPACE Simulator.

RTI handles any kind of continuous-time, discrete-time, and multirate system. Depending on the I/O hardware, different channels of the same I/O board can be used with different sample rates, and even in different subsystems. RTI supports asynchronous events and lets you set task priorities and task overrun strategies for executing the interrupt-driven subsystems. It also supports time-triggered tasks and timetables, which let you implement tasks and groups of tasks with variable or predefined delay times in relation to an associated trigger event. This makes task handling in your model very flexible. In addition, RTI offers checks that help avoid double or improper use of channels.

Benefits.

RTI-MP offers a maximum of convenience to accomplish tasks such as:

  • Partitioning the system for optimum processor load
  • Defining interprocessor communication channels
  • Producing the communication code for a network of several processors or cores System dynamics can be designed in Simulink.

 

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